Titan is a prototype of the ICT Atlas 2 computer. The computing system is made up of the following main parts:
The control unit produces in correct sequence the control signals necessary to call for an instruction, decode it, modify the address, obtain the operand from the store if necessary and obey the instruction.
The B-arithmetic unit provides integer arithmetic and logical operations: it is used for constructing the modified address and also for operations on the numbers held in the B-registers. The address of the current instruction is held in one of three special B-registers called control registers. Before the current instruction is decoded the contents of the control register in use are increased by one in anticipation of the next instruction.
The arithmetic unit operates on numbers held in a floating octal representation, and includes a double-length accumulator.
The main store of Titan consists at present of 128K (128x1024) words.
The store is shared between object programs, the Supervisor, the extracodes and buffer regions for peripheral devices. The current object program is allowed access to a defined area of the store, and any attempt to make references outside this area leads to entry to the Supervisor. Object programs are written as if they started at address 0, relocation to the actual address used being done at run-time, by hardware. The Supervisor has, of course, unrestricted access to the whole of the core store.
The Supervisor is an "effectively-built-in" program which controls the input-output devices and magnetic tapes, assembles new jobs on the disc , schedules them for execution in the most efficient way, arranges time-sharing between programs, provides two-way communication with the operator, keeps a log, and in general deals with all the routine matters which would be the responsibility of the operator on a conventional machine.
Input and output devices are connected to the central computer by the peripheral co-ordinator, which contains buffer registers and control flip-flops. These are collectively known as the peripheral V-store, and are only accessible to the Supervisor. Magnetic tapes are dealt with in a similar way.
Input-output devices at present attached to Titan are:
|3||Elliott 5, 7 or 8 track tape readers (1000 ch/sec)|
|2||Teletype 5, 7 or 8 track tape punches (110 ch/sec)|
|1||Creed 300 paper tape punch (300 ch/sec)|
|2||Alpha-numeric line printers (600 lines/minute, 120 characters per line)|
|1||Engineers' tape reader||}||not available to ordinary programs.|
|1||IBM 731 input-output typewriter||}|
The store is divided into four sections, each with its own read-write circuitry. The sections are numbered 0, 1, 2, 3, and section j contains all registers with address j mod 4. This means that successive instructions are taken from different sections thus effectively reducing the access time. Execution of successive instructions is overlapped and consequently it is forbidden to modify the next instruction, since this leads to unpredictable results.
This is a store of 32 fast registers, with effectively zero access time. Any loop of 32 or less instructions is obeyed the first time from the core store, and subsequently from the slave store, with consequent increase in speed. As the size of the loop increases above 32 the benefit from the slave store decreases, until with a loop of 64 instructions it has no effect. The slave store is entirely automatic in operation; the programmer has no direct control over it.
A register has 48 bits, numbered from 0 to 47, starting at the less significant end. (N.B. This is the opposite of the convention used in the Atlas Programming Manual.) A word can represent any one of the following:
-------- ------- -------- ------- | F | | Ba | | Bm | | N | -------- ------- -------- ------- 47 38 37 31 30 24 23 0
------------ ----------- | | | | ------------ ----------- 47 27. 24 23 3. 0
----- ----- ----- ----- ------ ----- ----- ------ | 0 | | 1 | | 2 | | 3 | | 4 | | 5 | | 6 | | 7 | ----- ----- ----- ----- ------ ----- ----- ------ 47 24 23 0
------------ ------------ | Exponent | | Mantissa | ------------ ------------ 47 40 39 0
Digits 0 to 23 of an instruction form the address. For some instructions this is used directly as an operand; for others it specifies a store register. In this case it is split up into 4 parts:
----- ------------- -------- --------- | | | | | | | | ----- ------------- -------- --------- 23 20 19 3 2 1,0
Digits 23-21 identify the store type, and are all zeros for ordinary object program addresses. Digit 20 is always zero.
Digits 19 to 3 give a full-word address.
Digit 2 is the half-word address: it is a 1 when the most significant half-word is referred to.
Digits 1, 0 are the character address within a half-word. They are used only by extracodes, and are ignored by all basic functions, except two test codes which test digit 0. It is conventional to speak of an address being even or odd according as digit 0 is a zero or a one.
An instruction is made up from four parts:
F Ba Bm N
Ba, Bm refer to B registers. There are 128 B registers some of which are not useful to the ordinary program.
The 10 bit function is regarded as being made up of 1 binary digit and 3 octal digits. The binary digit is zero for basic codes, and one for extracodes. (A basic code is executed entirely by hardware; an extracode is executed by a system subroutine.)
The first octal digit of a basic code defines the instruction type, as follows:
|2||Test instruction||(Test code)|
For an extracode the three octal digits define an entry in a 512-way jump table, by which control is sent to the appropriate system subroutine. These subroutines are kept in a reserved part of the store; to the programmer an extracode appears as a single instruction, rather slower than a basic code.
Instructions are written one to a line, the component parts being separated by spaces or tabs, e.g.
113 12 10 16 1123 98 0 23.7
Note that the first digit of the function is omitted if zero. B-register numbers are written in decimal, addresses are normally written in decimal, with an octal fraction representing bits 2-0, omitted if they are zero. Thus address 16 means either the whole word or the more-significant halfword, depending on context, whilst address 16.4 means the less-significant half-word.
Copyright © 1965-1969 University of Cambridge Computer Laboratory. Distributed by permission. Thanks to Barry Landy, Roger Needham and David Hartley for giving permission to distribute these documents. Thanks to Barry Landy for lending me the paper document from which this was scanned. Any typographical errors probably arose in the course of OCR.
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