[CST-2] OptComp CST99/9/4: Instruction Scheduling

[Matthew Richards]

> I would like to check whether someone has got an alternative solution or
> additional ideas to 99/9/4 (a) and (b).

You seem to mean 99/9/7, in fact.

For (a), I think it's probably worth saying that there are things the
compiler could do to alleviate the problem:

- this is an example of the phase order problem - if the compiler did
instruction scheduling before register allocation, the problem wouldn't
arise.  Of course, then the register allocation phase would probably add
further dependencies and so cause more interlocks, so this isn't much of a
solution.

- you can avoid the problem register allocation causes in this case by
cycling the "default" register that gets used in the register colouring.  Ie
the code fragment given would have had two virtual registers, v0 and v1 say,
and then the register colouring mapped them both to r0 because they didn't
clash.  Instead, it could have mapped the first to r0, and the second to r1,
and that would have solved the problem.

I agree with your answer to (b).

> [What does the ".w" stand for, actually?]

I think it stands for "word", but I might be wrong.


Hope that helps,
Matthew